Modern CPUs have multiple caches. In fact, they have a whole cache hierarchy. In this video, I discuss how modern CPU cache hierarchies are structured, describe the properties of each cache level, explain cache inclusion policies, and provide an example of how the processor reads and writes data within the cache hierarchy.
SUMMARY
The cache closest to the processor core is the smallest and fastest, while the farthest cache is the largest but slowest. Most architectures include three levels of cache: L1, L2, and L3. The L1 cache is the smallest and is located closest to the processor core, designed to match its speed. L2 is positioned in the middle, and L3 is the largest cache, located farthest from the processor core.
LINKS
SOURCES
• Book: Computer Organization and Design RISC-V Edition: The Hardware Software Interface
TABLE OF CONTENTS
00:00 Why caches matter?
00:23 Modern cache hierarchy structure
00:34 Components of a cache hierarchy
02:00 Cache level properties
03:02 Cache inclusion policies
04:30 Read operation examples
05:35 Write operation example
#computerscience #cache #cpucache #cachehierarchy #softwareengineer #cpu